Compiler to Hardware Contract

  
Figure 7: Hardware Specification File

The third-stage contract is between the compiler writer and the hardware. It is at this stage that specific details (like timing, reliability, and topology) are specified. This information can be specified in a hardware specification file or determined from a microcode simulator. A preliminary example is given in Figure 7. Its contents must include sufficient detail and information to provide the compiler with the resources it needs to estimate wall clock time and output error for the application at hand. In addition, the compiler must know about parallel features in the likelihood that an optimization is needed or requested. Hence, the essential features to be included in the file include, but are not limited to:

• clock cycle time
• time to execute the various arithmetic and logic functions for both INTEGER and FLOATING POINT representations under the different precisions that are available
• precisions and ranges for the INTEGER and FLOATING POINT representations including information on how the values are stored ( e.g. biased format for exponents )
• the number of and types of functional units including chaining information and restrictions
• a full description of the memory regime including the cache policies in use
• parallel topology (if any)
• communication network information

 
Figure 7: (Continued) Hardware Specification File